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Refactored struct in bl808_load_flash_para to use initializer
Compatability isues in older compilers are possible as a result of this change.
This commit is contained in:
Pavel Zakopaylo
parent
dddb316d91
commit
80a0854f2c
167
lib/blisp.c
167
lib/blisp.c
@ -481,91 +481,92 @@ blisp_return_t bl808_load_flash_para(struct blisp_device* device) {
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// TODO: I don't understand why these parameters are the way they are,
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// but at least they are labeled. Also, flash_io_mode and flash_clk_delay
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// seem to be duplicated in the main spi_flash_cfg_t struct?
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uint8_t flash_pin = 0x4;
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uint8_t flash_clk_cfg = 0x41;
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uint8_t flash_io_mode = 0x01;
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uint8_t flash_clk_delay = 0;
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const uint8_t flash_pin = 0x4;
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const uint8_t flash_clk_cfg = 0x41;
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const uint8_t flash_io_mode = 0x01;
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const uint8_t flash_clk_delay = 0;
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// Yes, these values are (slightly) different to the ones in blisp_chip_bl808.c
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struct bl808_spi_flash_cfg_t cfg = {0};
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cfg.ioMode = 0x04;
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cfg.cReadSupport = 0x01;
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cfg.clkDelay = 0;
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cfg.clkInvert = 0;
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cfg.resetEnCmd = 0x66;
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cfg.resetCmd = 0x99;
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cfg.resetCreadCmd = 0xff;
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cfg.resetCreadCmdSize = 0x03;
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cfg.jedecIdCmd = 0x9f;
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cfg.jedecIdCmdDmyClk = 0;
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cfg.enter32BitsAddrCmd = 0xb7;
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cfg.exit32BitsAddrCmd = 0xe9;
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cfg.sectorSize = 0x04;
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cfg.mid = 0xef;
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cfg.pageSize = 0x100;
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cfg.chipEraseCmd = 0xc7;
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cfg.sectorEraseCmd = 0x20;
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cfg.blk32EraseCmd = 0x52;
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cfg.blk64EraseCmd = 0xd8;
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cfg.writeEnableCmd = 0x06;
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cfg.pageProgramCmd = 0x02;
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cfg.qpageProgramCmd = 0x32;
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cfg.qppAddrMode = 0;
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cfg.fastReadCmd = 0x0b;
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cfg.frDmyClk = 0x01;
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cfg.qpiFastReadCmd = 0x0b;
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cfg.qpiFrDmyClk = 0x01;
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cfg.fastReadDoCmd = 0x3b;
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cfg.frDoDmyClk = 0x01;
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cfg.fastReadDioCmd = 0xbb;
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cfg.frDioDmyClk = 0;
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cfg.fastReadQoCmd = 0x6b;
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cfg.frQoDmyClk = 0x01;
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cfg.fastReadQioCmd = 0xeb;
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cfg.frQioDmyClk = 0x02;
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cfg.qpiFastReadQioCmd = 0xeb;
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cfg.qpiFrQioDmyClk = 0x02;
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cfg.qpiPageProgramCmd = 0x02;
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cfg.writeVregEnableCmd = 0x50;
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cfg.wrEnableIndex = 0;
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cfg.qeIndex = 0x01;
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cfg.busyIndex = 0;
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cfg.wrEnableBit = 0x01;
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cfg.qeBit = 0x01;
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cfg.busyBit = 0;
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cfg.wrEnableWriteRegLen = 0x02;
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cfg.wrEnableReadRegLen = 0x01;
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cfg.qeWriteRegLen = 0x01;
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cfg.qeReadRegLen = 0x01;
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cfg.releasePowerDown = 0xab;
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cfg.busyReadRegLen = 0x01;
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cfg.readRegCmd[0] = 0x05;
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cfg.readRegCmd[1] = 0x35;
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cfg.readRegCmd[2] = 0;
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cfg.readRegCmd[3] = 0;
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cfg.writeRegCmd[0] = 0x01;
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cfg.writeRegCmd[1] = 0x31;
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cfg.writeRegCmd[2] = 0;
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cfg.writeRegCmd[3] = 0;
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cfg.enterQpi = 0x38;
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cfg.exitQpi = 0xff;
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cfg.cReadMode = 0xa0;
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cfg.cRExit = 0xff;
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cfg.burstWrapCmd = 0x77;
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cfg.burstWrapCmdDmyClk = 0x03;
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cfg.burstWrapDataMode = 0x02;
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cfg.burstWrapData = 0x40;
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cfg.deBurstWrapCmd = 0x77;
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cfg.deBurstWrapCmdDmyClk = 0x03;
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cfg.deBurstWrapDataMode = 0x02;
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cfg.deBurstWrapData = 0xf0;
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cfg.timeEsector = 0x12c;
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cfg.timeE32k = 0x4b0;
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cfg.timeE64k = 0x4b0;
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cfg.timePagePgm = 0x05;
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cfg.timeCe = 0x80e8;
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cfg.pdDelay = 0x03;
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cfg.qeData = 0;
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const static struct bl808_spi_flash_cfg_t cfg = {
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.ioMode = 0x04,
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.cReadSupport = 0x01,
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.clkDelay = 0,
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.clkInvert = 0,
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.resetEnCmd = 0x66,
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.resetCmd = 0x99,
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.resetCreadCmd = 0xff,
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.resetCreadCmdSize = 0x03,
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.jedecIdCmd = 0x9f,
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.jedecIdCmdDmyClk = 0,
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.enter32BitsAddrCmd = 0xb7,
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.exit32BitsAddrCmd = 0xe9,
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.sectorSize = 0x04,
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.mid = 0xef,
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.pageSize = 0x100,
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.chipEraseCmd = 0xc7,
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.sectorEraseCmd = 0x20,
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.blk32EraseCmd = 0x52,
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.blk64EraseCmd = 0xd8,
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.writeEnableCmd = 0x06,
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.pageProgramCmd = 0x02,
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.qpageProgramCmd = 0x32,
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.qppAddrMode = 0,
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.fastReadCmd = 0x0b,
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.frDmyClk = 0x01,
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.qpiFastReadCmd = 0x0b,
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.qpiFrDmyClk = 0x01,
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.fastReadDoCmd = 0x3b,
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.frDoDmyClk = 0x01,
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.fastReadDioCmd = 0xbb,
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.frDioDmyClk = 0,
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.fastReadQoCmd = 0x6b,
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.frQoDmyClk = 0x01,
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.fastReadQioCmd = 0xeb,
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.frQioDmyClk = 0x02,
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.qpiFastReadQioCmd = 0xeb,
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.qpiFrQioDmyClk = 0x02,
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.qpiPageProgramCmd = 0x02,
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.writeVregEnableCmd = 0x50,
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.wrEnableIndex = 0,
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.qeIndex = 0x01,
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.busyIndex = 0,
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.wrEnableBit = 0x01,
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.qeBit = 0x01,
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.busyBit = 0,
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.wrEnableWriteRegLen = 0x02,
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.wrEnableReadRegLen = 0x01,
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.qeWriteRegLen = 0x01,
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.qeReadRegLen = 0x01,
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.releasePowerDown = 0xab,
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.busyReadRegLen = 0x01,
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.readRegCmd[0] = 0x05,
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.readRegCmd[1] = 0x35,
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.readRegCmd[2] = 0,
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.readRegCmd[3] = 0,
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.writeRegCmd[0] = 0x01,
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.writeRegCmd[1] = 0x31,
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.writeRegCmd[2] = 0,
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.writeRegCmd[3] = 0,
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.enterQpi = 0x38,
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.exitQpi = 0xff,
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.cReadMode = 0xa0,
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.cRExit = 0xff,
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.burstWrapCmd = 0x77,
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.burstWrapCmdDmyClk = 0x03,
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.burstWrapDataMode = 0x02,
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.burstWrapData = 0x40,
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.deBurstWrapCmd = 0x77,
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.deBurstWrapCmdDmyClk = 0x03,
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.deBurstWrapDataMode = 0x02,
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.deBurstWrapData = 0xf0,
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.timeEsector = 0x12c,
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.timeE32k = 0x4b0,
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.timeE64k = 0x4b0,
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.timePagePgm = 0x05,
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.timeCe = 0x80e8,
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.pdDelay = 0x03,
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.qeData = 0,
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};
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const uint32_t payload_size = 4 + sizeof(struct bl808_spi_flash_cfg_t);
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uint8_t payload[payload_size] = {};
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