From 80a0854f2c75c1efdf562e75adc8f9d7d423e1a6 Mon Sep 17 00:00:00 2001
From: Pavel Zakopaylo <zakopaylo2@gmail.com>
Date: Fri, 1 Dec 2023 15:20:49 +1100
Subject: [PATCH] Refactored struct in bl808_load_flash_para to use initializer

Compatability isues in older compilers are possible as a result
of this change.
---
 lib/blisp.c | 167 ++++++++++++++++++++++++++--------------------------
 1 file changed, 84 insertions(+), 83 deletions(-)

diff --git a/lib/blisp.c b/lib/blisp.c
index 2ffacaf..5860c2e 100644
--- a/lib/blisp.c
+++ b/lib/blisp.c
@@ -481,91 +481,92 @@ blisp_return_t bl808_load_flash_para(struct blisp_device* device) {
   // TODO: I don't understand why these parameters are the way they are,
   //       but at least they are labeled. Also, flash_io_mode and flash_clk_delay
   //       seem to be duplicated in the main spi_flash_cfg_t struct?
-  uint8_t flash_pin = 0x4;
-  uint8_t flash_clk_cfg = 0x41;
-  uint8_t flash_io_mode = 0x01;
-  uint8_t flash_clk_delay = 0;
+  const uint8_t flash_pin = 0x4;
+  const uint8_t flash_clk_cfg = 0x41;
+  const uint8_t flash_io_mode = 0x01;
+  const uint8_t flash_clk_delay = 0;
   
   // Yes, these values are (slightly) different to the ones in blisp_chip_bl808.c
-  struct bl808_spi_flash_cfg_t cfg = {0};
-  cfg.ioMode = 0x04;
-  cfg.cReadSupport = 0x01;
-  cfg.clkDelay = 0;
-  cfg.clkInvert = 0;
-  cfg.resetEnCmd = 0x66;
-  cfg.resetCmd = 0x99;
-  cfg.resetCreadCmd = 0xff;
-  cfg.resetCreadCmdSize = 0x03;
-  cfg.jedecIdCmd = 0x9f;
-  cfg.jedecIdCmdDmyClk = 0;
-  cfg.enter32BitsAddrCmd = 0xb7;
-  cfg.exit32BitsAddrCmd = 0xe9;
-  cfg.sectorSize = 0x04;
-  cfg.mid = 0xef;
-  cfg.pageSize = 0x100;
-  cfg.chipEraseCmd = 0xc7;
-  cfg.sectorEraseCmd = 0x20;
-  cfg.blk32EraseCmd = 0x52;
-  cfg.blk64EraseCmd = 0xd8;
-  cfg.writeEnableCmd = 0x06;
-  cfg.pageProgramCmd = 0x02;
-  cfg.qpageProgramCmd = 0x32;
-  cfg.qppAddrMode = 0;
-  cfg.fastReadCmd = 0x0b;
-  cfg.frDmyClk = 0x01;
-  cfg.qpiFastReadCmd = 0x0b;
-  cfg.qpiFrDmyClk = 0x01;
-  cfg.fastReadDoCmd = 0x3b;
-  cfg.frDoDmyClk = 0x01;
-  cfg.fastReadDioCmd = 0xbb;
-  cfg.frDioDmyClk = 0;
-  cfg.fastReadQoCmd = 0x6b;
-  cfg.frQoDmyClk = 0x01;
-  cfg.fastReadQioCmd = 0xeb;
-  cfg.frQioDmyClk = 0x02;
-  cfg.qpiFastReadQioCmd = 0xeb;
-  cfg.qpiFrQioDmyClk = 0x02;
-  cfg.qpiPageProgramCmd = 0x02;
-  cfg.writeVregEnableCmd = 0x50;
-  cfg.wrEnableIndex = 0;
-  cfg.qeIndex = 0x01;
-  cfg.busyIndex = 0;
-  cfg.wrEnableBit = 0x01;
-  cfg.qeBit = 0x01;
-  cfg.busyBit = 0;
-  cfg.wrEnableWriteRegLen = 0x02;
-  cfg.wrEnableReadRegLen = 0x01;
-  cfg.qeWriteRegLen = 0x01;
-  cfg.qeReadRegLen = 0x01;
-  cfg.releasePowerDown = 0xab;
-  cfg.busyReadRegLen = 0x01;
-  cfg.readRegCmd[0] = 0x05;
-  cfg.readRegCmd[1] = 0x35;
-  cfg.readRegCmd[2] = 0;
-  cfg.readRegCmd[3] = 0;
-  cfg.writeRegCmd[0] = 0x01;
-  cfg.writeRegCmd[1] = 0x31;
-  cfg.writeRegCmd[2] = 0;
-  cfg.writeRegCmd[3] = 0;
-  cfg.enterQpi = 0x38;
-  cfg.exitQpi = 0xff;
-  cfg.cReadMode = 0xa0;
-  cfg.cRExit = 0xff;
-  cfg.burstWrapCmd = 0x77;
-  cfg.burstWrapCmdDmyClk = 0x03;
-  cfg.burstWrapDataMode = 0x02;
-  cfg.burstWrapData = 0x40;
-  cfg.deBurstWrapCmd = 0x77;
-  cfg.deBurstWrapCmdDmyClk = 0x03;
-  cfg.deBurstWrapDataMode = 0x02;
-  cfg.deBurstWrapData = 0xf0;
-  cfg.timeEsector = 0x12c;
-  cfg.timeE32k = 0x4b0;
-  cfg.timeE64k = 0x4b0;
-  cfg.timePagePgm = 0x05;
-  cfg.timeCe = 0x80e8;
-  cfg.pdDelay = 0x03;
-  cfg.qeData = 0;
+  const static struct bl808_spi_flash_cfg_t cfg = {
+    .ioMode = 0x04,
+    .cReadSupport = 0x01,
+    .clkDelay = 0,
+    .clkInvert = 0,
+    .resetEnCmd = 0x66,
+    .resetCmd = 0x99,
+    .resetCreadCmd = 0xff,
+    .resetCreadCmdSize = 0x03,
+    .jedecIdCmd = 0x9f,
+    .jedecIdCmdDmyClk = 0,
+    .enter32BitsAddrCmd = 0xb7,
+    .exit32BitsAddrCmd = 0xe9,
+    .sectorSize = 0x04,
+    .mid = 0xef,
+    .pageSize = 0x100,
+    .chipEraseCmd = 0xc7,
+    .sectorEraseCmd = 0x20,
+    .blk32EraseCmd = 0x52,
+    .blk64EraseCmd = 0xd8,
+    .writeEnableCmd = 0x06,
+    .pageProgramCmd = 0x02,
+    .qpageProgramCmd = 0x32,
+    .qppAddrMode = 0,
+    .fastReadCmd = 0x0b,
+    .frDmyClk = 0x01,
+    .qpiFastReadCmd = 0x0b,
+    .qpiFrDmyClk = 0x01,
+    .fastReadDoCmd = 0x3b,
+    .frDoDmyClk = 0x01,
+    .fastReadDioCmd = 0xbb,
+    .frDioDmyClk = 0,
+    .fastReadQoCmd = 0x6b,
+    .frQoDmyClk = 0x01,
+    .fastReadQioCmd = 0xeb,
+    .frQioDmyClk = 0x02,
+    .qpiFastReadQioCmd = 0xeb,
+    .qpiFrQioDmyClk = 0x02,
+    .qpiPageProgramCmd = 0x02,
+    .writeVregEnableCmd = 0x50,
+    .wrEnableIndex = 0,
+    .qeIndex = 0x01,
+    .busyIndex = 0,
+    .wrEnableBit = 0x01,
+    .qeBit = 0x01,
+    .busyBit = 0,
+    .wrEnableWriteRegLen = 0x02,
+    .wrEnableReadRegLen = 0x01,
+    .qeWriteRegLen = 0x01,
+    .qeReadRegLen = 0x01,
+    .releasePowerDown = 0xab,
+    .busyReadRegLen = 0x01,
+    .readRegCmd[0] = 0x05,
+    .readRegCmd[1] = 0x35,
+    .readRegCmd[2] = 0,
+    .readRegCmd[3] = 0,
+    .writeRegCmd[0] = 0x01,
+    .writeRegCmd[1] = 0x31,
+    .writeRegCmd[2] = 0,
+    .writeRegCmd[3] = 0,
+    .enterQpi = 0x38,
+    .exitQpi = 0xff,
+    .cReadMode = 0xa0,
+    .cRExit = 0xff,
+    .burstWrapCmd = 0x77,
+    .burstWrapCmdDmyClk = 0x03,
+    .burstWrapDataMode = 0x02,
+    .burstWrapData = 0x40,
+    .deBurstWrapCmd = 0x77,
+    .deBurstWrapCmdDmyClk = 0x03,
+    .deBurstWrapDataMode = 0x02,
+    .deBurstWrapData = 0xf0,
+    .timeEsector = 0x12c,
+    .timeE32k = 0x4b0,
+    .timeE64k = 0x4b0,
+    .timePagePgm = 0x05,
+    .timeCe = 0x80e8,
+    .pdDelay = 0x03,
+    .qeData = 0,
+  };
   
   const uint32_t payload_size = 4 + sizeof(struct bl808_spi_flash_cfg_t);
   uint8_t payload[payload_size] = {};